regs->eflags &= ~X86_EFLAGS_RF;
if ( bpmatch || (regs->eflags & X86_EFLAGS_TF) )
{
- current->arch.debugreg[6] |= bpmatch | 0xffff0ff0;
+ current->arch.debugreg[6] |= bpmatch | DR_STATUS_RESERVED_ONE;
if ( regs->eflags & X86_EFLAGS_TF )
- current->arch.debugreg[6] |= 0x4000;
+ current->arch.debugreg[6] |= DR_STEP;
do_guest_trap(TRAP_debug, regs, 0);
}
}
* DR6: Bits 4-11,16-31 reserved (set to 1).
* Bit 12 reserved (set to 0).
*/
- value &= 0xffffefff; /* reserved bits => 0 */
- value |= 0xffff0ff0; /* reserved bits => 1 */
+ value &= ~DR_STATUS_RESERVED_ZERO; /* reserved bits => 0 */
+ value |= DR_STATUS_RESERVED_ONE; /* reserved bits => 1 */
if ( v == curr )
write_debugreg(6, value);
break;
#define DR_STEP (0x4000) /* single-step */
#define DR_SWITCH (0x8000) /* task switch */
#define DR_NOT_RTM (0x10000) /* clear: #BP inside RTM region */
+#define DR_STATUS_RESERVED_ZERO (~0xffffeffful) /* Reserved, read as zero */
+#define DR_STATUS_RESERVED_ONE 0xffff0ff0ul /* Reserved, read as one */
/* Now define a bunch of things for manipulating the control register.
The top two bytes of the control register consist of 4 fields of 4